Ready to send

MLI/Modular/BreakoutBoard/BreakoutBoard.kicad_pcb

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   (page A4)
   (title_block
     (title "Breakout Board")
-    (date 2017-12-14)
+    (date 2018-01-04)
     (rev "Release 0.1")
     (company "Enertechnos Ltd.")
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MLI/Modular/BreakoutBoard/BreakoutBoard.kicad_pcb-bak

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@@ -15,10 +15,10 @@
   (page A4)
   (title_block
     (title "Breakout Board")
-    (date 2017-12-14)
-    (rev Rev3.4)
+    (date 2018-01-04)
+    (rev "Release 0.1")
     (company "Enertechnos Ltd.")
-    (comment 1 "FOR REVIEW")
+    (comment 1 "APPROVED for Prototype")
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MLI/Modular/BreakoutBoard/BreakoutBoard.sch

@@ -36,10 +36,10 @@ $Descr A4 11693 8268
 encoding utf-8
 Sheet 1 10
 Title "Breakout Board"
-Date "2017-12-19"
+Date "2018-01-04"
 Rev "Release 0.1"
 Comp "Enertechnos Ltd."
-Comment1 "FOR REVIEW - NOT APPROVED"
+Comment1 "APPROVED for Prototype"
 Comment2 ""
 Comment3 "As such ANALOG INPUTS must receive voltage not higher than 3.3V."
 Comment4 "WARNING: ChipKit WiFire runs at 3.3V AND IS NOT 5V-safe."

MLI/Modular/BreakoutBoard/FuseBoardConnection.sch

@@ -36,10 +36,10 @@ $Descr User 8268 5846
 encoding utf-8
 Sheet 10 10
 Title "Breakout Board"
-Date "2017-12-19"
+Date "2018-01-04"
 Rev "Release 0.1"
 Comp "Enertechnos Ltd."
-Comment1 "FOR REVIEW - NOT APPROVED"
+Comment1 "APPROVED for Prototype"
 Comment2 ""
 Comment3 "As such ANALOG INPUTS must receive voltage not higher than 3.3V."
 Comment4 "WARNING: ChipKit WiFire runs at 3.3V AND IS NOT 5V-safe."

MLI/Modular/BreakoutBoard/Module.sch

@@ -36,10 +36,10 @@ $Descr User 8268 5846
 encoding utf-8
 Sheet 5 10
 Title "Breakout Board"
-Date "2017-12-19"
+Date "2018-01-04"
 Rev "Release 0.1"
 Comp "Enertechnos Ltd."
-Comment1 "FOR REVIEW - NOT APPROVED"
+Comment1 "APPROVED for Prototype"
 Comment2 ""
 Comment3 "As such ANALOG INPUTS must receive voltage not higher than 3.3V."
 Comment4 "WARNING: ChipKit WiFire runs at 3.3V AND IS NOT 5V-safe."

MLI/Modular/BreakoutBoard/Plot/BreakoutBoard-B.Mask.gbr

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MLI/Modular/BreakoutBoard/Plot/BreakoutBoard-Edge.Cuts.gbr

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MLI/Modular/FuseBoard/Fuseboard.kicad_pcb

@@ -3,7 +3,7 @@
   (general
     (links 108)
     (no_connects 0)
-    (area 40.564999 68.504999 152.475001 182.955001)
+    (area 40.564999 68.167 152.475001 183.345)
     (thickness 1.6)
     (drawings 22)
     (tracks 358)
@@ -15,10 +15,10 @@
   (page A4)
   (title_block
     (title "Fuse Board")
-    (date 2017-12-14)
+    (date 2018-01-04)
     (rev "Release 0.1a")
     (company "Enertechnos Ltd.")
-    (comment 1 "FOR REVIEW")
+    (comment 1 "APPROVED for Prototype")
   )
 
   (layers

MLI/Modular/FuseBoard/Fuseboard.kicad_pcb-bak

@@ -3,7 +3,7 @@
   (general
     (links 108)
     (no_connects 0)
-    (area 40.564999 68.167 152.475001 183.345)
+    (area 40.564999 68.504999 152.475001 182.955001)
     (thickness 1.6)
     (drawings 22)
     (tracks 358)
@@ -79,7 +79,7 @@
       (plotframeref false)
       (viasonmask false)
       (mode 1)
-      (useauxorigin false)
+      (useauxorigin true)
       (hpglpennumber 1)
       (hpglpenspeed 20)
       (hpglpendiameter 15)

MLI/Modular/FuseBoard/Fuseboard.sch

@@ -39,7 +39,7 @@ Title "Fuseboard with Voltage metering"
 Date "2018-01-04"
 Rev "Release 0.1a"
 Comp "Enertechnos Ltd"
-Comment1 "FOR REVIEW"
+Comment1 "APPROVED for Prototype"
 Comment2 ""
 Comment3 ""
 Comment4 ""

MLI/Modular/FuseBoard/Plot/Fuseboard-B.Cu.gbr

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Copper,L2,Bot,Signal*
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 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.7) date 01/04/18 11:03:44*
+G04 Created by KiCad (PCBNEW 4.0.7) date 01/04/18 12:22:23*
 %MOMM*%
 %LPD*%
 G01*

MLI/Modular/FuseBoard/Plot/Fuseboard-B.Mask.gbr

@@ -1,7 +1,7 @@
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 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.7) date 01/04/18 11:03:44*
+G04 Created by KiCad (PCBNEW 4.0.7) date 01/04/18 12:22:23*
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 %LPD*%
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MLI/Modular/FuseBoard/Plot/Fuseboard-Edge.Cuts.gbr

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MLI/Modular/FuseBoard/Plot/Fuseboard-F.Cu.gbr

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+G04 Created by KiCad (PCBNEW 4.0.7) date 01/04/18 12:22:23*
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MLI/Modular/FuseBoard/Plot/Fuseboard-F.Mask.gbr

@@ -1,7 +1,7 @@
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MLI/Modular/FuseBoard/Plot/Fuseboard-F.SilkS.gbr

@@ -1,7 +1,7 @@
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MLI/Modular/FuseBoard/Plot/Fuseboard.drl

@@ -1,5 +1,5 @@
 M48
-;DRILL file {KiCad 4.0.7} date 01/04/18 11:03:58
+;DRILL file {KiCad 4.0.7} date 01/04/18 12:22:28
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 FMAT,2
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MLI/Modular/FuseBoard/VoltMeter.sch

@@ -39,7 +39,7 @@ Title "Fuseboard with Voltage metering"
 Date "2018-01-04"
 Rev "Release 0.1a"
 Comp "Enertechnos Ltd"
-Comment1 "FOR REVIEW"
+Comment1 "APPROVED for Prototype"
 Comment2 ""
 Comment3 ""
 Comment4 ""

MLI/Modular/HBridgePowerModule/HBridgePowerModule-cache.lib

@@ -19,6 +19,30 @@ X ~ 2 0 -150 110 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# CAS_50-NP
+#
+DEF CAS_50-NP IC 0 30 Y Y 1 F N
+F0 "IC" 600 150 50 H V C CNN
+F1 "CAS_50-NP" 600 -550 50 H V C CNN
+F2 "CAS_NP" 600 -650 50 H I C CNN
+F3 "http://www.lem.com/docs/products/lts_15-np.pdf" 600 -750 50 H I C CNN
+$FPLIST
+ CAS_NP
+$ENDFPLIST
+DRAW
+S 200 100 1000 -500 0 0 10 f
+X IN(1) 1 0 0 200 R 50 50 0 0 U
+X IN(2) 2 0 -100 200 R 50 50 0 0 U
+X IN(3) 3 0 -200 200 R 50 50 0 0 U
+X OUT(3) 8 1200 -200 200 L 50 50 0 0 U
+X OUT(2) 9 1200 -100 200 L 50 50 0 0 U
+X OUT(3) 10 1200 0 200 L 50 50 0 0 U
+X Vout 11 0 -450 200 R 50 50 0 0 U
+X GND 12 0 -350 200 R 50 50 0 0 U
+X +5V 13 1200 -350 200 L 50 50 0 0 U
+ENDDRAW
+ENDDEF
+#
 # Conn_01x01
 #
 DEF Conn_01x01 J 0 40 Y N 1 F N
@@ -41,6 +65,32 @@ X Pin_1 1 -200 0 150 R 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# Conn_01x03
+#
+DEF Conn_01x03 J 0 40 Y N 1 F N
+F0 "J" 0 200 50 H V C CNN
+F1 "Conn_01x03" 0 -200 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ Connector*:*_??x*mm*
+ Connector*:*1x??x*mm*
+ Pin?Header?Straight?1X*
+ Pin?Header?Angled?1X*
+ Socket?Strip?Straight?1X*
+ Socket?Strip?Angled?1X*
+$ENDFPLIST
+DRAW
+S -50 -95 0 -105 1 1 6 N
+S -50 5 0 -5 1 1 6 N
+S -50 105 0 95 1 1 6 N
+S -50 150 50 -150 1 1 10 f
+X Pin_1 1 -200 100 150 R 50 50 1 1 P
+X Pin_2 2 -200 0 150 R 50 50 1 1 P
+X Pin_3 3 -200 -100 150 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 # RFP12N10L
 #
 DEF RFP12N10L Q 0 30 Y Y 1 F N

MLI/Modular/HBridgePowerModule/HBridgePowerModule.kicad_pcb

@@ -1,7 +1,7 @@
 (kicad_pcb (version 4) (host pcbnew 4.0.7)
 
   (general
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     (no_connects 4)
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     (thickness 1.6)
@@ -72,14 +72,14 @@
     (aux_axis_origin 0 0)
     (visible_elements 7FFFEFFF)
     (pcbplotparams
-      (layerselection 0x000f0_80000001)
+      (layerselection 0x010e0_80000001)
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       (excludeedgelayer true)
       (linewidth 0.100000)
       (plotframeref false)
       (viasonmask false)
       (mode 1)
-      (useauxorigin false)
+      (useauxorigin true)
       (hpglpennumber 1)
       (hpglpenspeed 20)
       (hpglpendiameter 15)
@@ -95,7 +95,7 @@
       (mirror false)
       (drillshape 0)
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-      (outputdirectory ""))
+      (outputdirectory Plot/))
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MLI/Modular/HBridgePowerModule/HBridgePowerModule.kicad_pcb-bak

@@ -1,26 +1,26 @@
 (kicad_pcb (version 4) (host pcbnew 4.0.7)
 
   (general
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     (area 9.215716 13.81 220.980001 161.125)
     (thickness 1.6)
     (drawings 39)
     (tracks 121)
     (zones 0)
-    (modules 19)
+    (modules 20)
     (nets 13)
   )
 
-    (page A4)
+  (page A4)
   (title_block
     (title "H-Bridge Power Board")
     (date 2017-12-14)
-    (rev Rev3.3)
+    (rev "Release 0.1")
     (company "Enertechnos Ltd.")
     (comment 1 "FOR REVIEW")
   )
-  
+
   (layers
     (0 F.Cu mixed)
     (31 B.Cu power)
@@ -1192,6 +1192,191 @@
     )
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MLI/Modular/HBridgePowerModule/HBridgePowerModule.sch

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 encoding utf-8
 Sheet 1 5
 Title "MLI HBridge Power Board"
-Date "2017-12-14"
+Date "2018-01-04"
 Rev "Release 0.1"
 Comp "Enertechnos Ltd"
-Comment1 "FOR REVIEW"
+Comment1 "APPROVED for Prototype"
 Comment2 ""
 Comment3 ""
 Comment4 ""

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 encoding utf-8
 Sheet 2 5
 Title "MLI HBridge Power Board"
-Date "2017-12-14"
+Date "2018-01-04"
 Rev "Release 0.1"
 Comp "Enertechnos Ltd"
-Comment1 "FOR REVIEW"
+Comment1 "APPROVED for Prototype"
 Comment2 ""
 Comment3 ""
 Comment4 ""

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   (page A4)
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+    (date 2018-01-04)
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MLI/Modular/PsuPowerModule/PsuPowerModule.sch

@@ -36,10 +36,10 @@ $Descr A4 11693 8268
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 Sheet 1 5
 Title "MLI Module Power Board"
-Date "2017-12-14"
+Date "2018-01-04"
 Rev "Release 0.1"
 Comp "Enertechnos Ltd"
-Comment1 "FOR REVIEW"
+Comment1 "APPROVED for Prototype"
 Comment2 ""
 Comment3 ""
 Comment4 ""

MLI/Modular/PsuPowerModule/SinglePowerSwitch.sch

@@ -36,10 +36,10 @@ $Descr User 8268 5846
 encoding utf-8
 Sheet 4 5
 Title ""
-Date ""
+Date "2018-01-04"
 Rev ""
 Comp ""
-Comment1 ""
+Comment1 "APPROVED for Prototype"
 Comment2 ""
 Comment3 ""
 Comment4 ""

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MLI/Modular/PsuSwitchModule/Plot/PsuSwitchModule.drl

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MLI/Modular/PsuSwitchModule/PsuSwitchModule.Switch.sch

@@ -36,10 +36,10 @@ $Descr User 8268 5846
 encoding utf-8
 Sheet 2 5
 Title "Power Module (Control Board)"
-Date "2017-12-14"
+Date "2018-01-04"
 Rev "Release 0.1"
 Comp "Enertechnos Ltd"
-Comment1 "FOR REVIEW"
+Comment1 "APPROVED for Prototype"
 Comment2 ""
 Comment3 ""
 Comment4 ""

MLI/Modular/PsuSwitchModule/PsuSwitchModule.kicad_pcb

@@ -27,6 +27,7 @@
     (33 F.Adhes user hide)
     (35 F.Paste user hide)
     (37 F.SilkS user)
+    (38 B.Mask user)
     (39 F.Mask user)
     (40 Dwgs.User user)
     (41 Cmts.User user hide)
@@ -63,17 +64,17 @@
     (pad_size 1.524 1.524)
     (pad_drill 0.762)
     (pad_to_mask_clearance 0.2)
-    (aux_axis_origin 0 0)
+    (aux_axis_origin 49.53 124.46)
     (visible_elements 7FFFEFFF)
     (pcbplotparams
-      (layerselection 0x00030_80000001)
+      (layerselection 0x010e0_80000001)
       (usegerberextensions false)
       (excludeedgelayer true)
       (linewidth 0.100000)
       (plotframeref false)
       (viasonmask false)
       (mode 1)
-      (useauxorigin false)
+      (useauxorigin true)
       (hpglpennumber 1)
       (hpglpenspeed 20)
       (hpglpendiameter 15)
@@ -87,9 +88,9 @@
       (subtractmaskfromsilk false)
       (outputformat 1)
       (mirror false)
-      (drillshape 1)
+      (drillshape 0)
       (scaleselection 1)
-      (outputdirectory ""))
+      (outputdirectory Plot/))
   )
 
   (net 0 "")

MLI/Modular/PsuSwitchModule/PsuSwitchModule.kicad_pcb-bak

@@ -2,8 +2,8 @@
 
   (general
     (links 151)
-    (no_connects 3)
-    (area 49.454999 34.214999 175.335001 124.535001)
+    (no_connects 0)
+    (area 44.852857 22.700001 193.27 124.535001)
     (thickness 1.6)
     (drawings 32)
     (tracks 524)
@@ -16,7 +16,7 @@
   (title_block
     (title "Power Module (Control Board)")
     (date 2017-12-14)
-    (rev Rev3.3)
+    (rev "Release 0.1")
     (company "Enertechnos Ltd.")
     (comment 1 "FOR REVIEW")
   )
@@ -27,6 +27,7 @@
     (33 F.Adhes user hide)
     (35 F.Paste user hide)
     (37 F.SilkS user)
+	(38 B.Mask user)
     (39 F.Mask user)
     (40 Dwgs.User user)
     (41 Cmts.User user hide)
@@ -63,17 +64,17 @@
     (pad_size 1.524 1.524)
     (pad_drill 0.762)
     (pad_to_mask_clearance 0.2)
-    (aux_axis_origin 0 0)
+    (aux_axis_origin 49.53 124.46)
     (visible_elements 7FFFEFFF)
     (pcbplotparams
-      (layerselection 0x00030_80000001)
+      (layerselection 0x010a0_80000001)
       (usegerberextensions false)
       (excludeedgelayer true)
       (linewidth 0.100000)
       (plotframeref false)
       (viasonmask false)
       (mode 1)
-      (useauxorigin false)
+      (useauxorigin true)
       (hpglpennumber 1)
       (hpglpenspeed 20)
       (hpglpendiameter 15)
@@ -87,9 +88,9 @@
       (subtractmaskfromsilk false)
       (outputformat 1)
       (mirror false)
-      (drillshape 1)
+      (drillshape 0)
       (scaleselection 1)
-      (outputdirectory ""))
+      (outputdirectory Plot/))
   )
 
   (net 0 "")
@@ -173,6 +174,67 @@
     (add_net "Net-(J2-Pad3)")
   )
 
+  (module Connectors_JST:JST_XH_B03B-XH-A_03x2.50mm_Straight (layer F.Cu) (tedit 5A4B882C) (tstamp 5A328A2C)
+    (at 91.52 118.142564)
+    (descr "JST XH series connector, B03B-XH-A, top entry type, through hole")
+    (tags "connector jst xh tht top vertical 2.50mm")
+    (path /5A3469C9)
+    (fp_text reference J101 (at 2.5 -3.5) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value "Current Sensor" (at 2.5 5.047436) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -2.45 -2.35) (end -2.45 3.4) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.45 3.4) (end 7.45 3.4) (layer F.Fab) (width 0.1))
+    (fp_line (start 7.45 3.4) (end 7.45 -2.35) (layer F.Fab) (width 0.1))
+    (fp_line (start 7.45 -2.35) (end -2.45 -2.35) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.95 -2.85) (end -2.95 3.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.95 3.9) (end 7.95 3.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 7.95 3.9) (end 7.95 -2.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 7.95 -2.85) (end -2.95 -2.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.55 -2.45) (end -2.55 3.5) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.55 3.5) (end 7.55 3.5) (layer F.SilkS) (width 0.12))
+    (fp_line (start 7.55 3.5) (end 7.55 -2.45) (layer F.SilkS) (width 0.12))
+    (fp_line (start 7.55 -2.45) (end -2.55 -2.45) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.75 -2.45) (end 0.75 -1.7) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.75 -1.7) (end 4.25 -1.7) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.25 -1.7) (end 4.25 -2.45) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.25 -2.45) (end 0.75 -2.45) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.55 -2.45) (end -2.55 -1.7) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.55 -1.7) (end -0.75 -1.7) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.75 -1.7) (end -0.75 -2.45) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.75 -2.45) (end -2.55 -2.45) (layer F.SilkS) (width 0.12))
+    (fp_line (start 5.75 -2.45) (end 5.75 -1.7) (layer F.SilkS) (width 0.12))
+    (fp_line (start 5.75 -1.7) (end 7.55 -1.7) (layer F.SilkS) (width 0.12))
+    (fp_line (start 7.55 -1.7) (end 7.55 -2.45) (layer F.SilkS) (width 0.12))
+    (fp_line (start 7.55 -2.45) (end 5.75 -2.45) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.55 -0.2) (end -1.8 -0.2) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.8 -0.2) (end -1.8 2.75) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.8 2.75) (end 2.5 2.75) (layer F.SilkS) (width 0.12))
+    (fp_line (start 7.55 -0.2) (end 6.8 -0.2) (layer F.SilkS) (width 0.12))
+    (fp_line (start 6.8 -0.2) (end 6.8 2.75) (layer F.SilkS) (width 0.12))
+    (fp_line (start 6.8 2.75) (end 2.5 2.75) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.35 -2.75) (end -2.85 -2.75) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.85 -2.75) (end -2.85 -0.25) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.35 -2.75) (end -2.85 -2.75) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.85 -2.75) (end -2.85 -0.25) (layer F.Fab) (width 0.1))
+    (fp_text user %R (at 2.5 2.5) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole rect (at 0 0) (size 1.75 1.75) (drill 1) (layers *.Cu *.Mask)
+      (net 32 ARD_CUR))
+    (pad 2 thru_hole circle (at 2.5 0) (size 1.75 1.75) (drill 1) (layers *.Cu *.Mask)
+      (net 10 ARD_GND))
+    (pad 3 thru_hole circle (at 5 0) (size 1.75 1.75) (drill 1) (layers *.Cu *.Mask)
+      (net 33 ARD_VCC))
+    (model Connectors_JST.3dshapes/JST_XH_B03B-XH-A_03x2.50mm_Straight.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
   (module Connectors_JST:JST_XH_B03B-XH-A_03x2.50mm_Straight (layer F.Cu) (tedit 5A4B8769) (tstamp 5A4B8B9E)
     (at 127.08 118.11)
     (descr "JST XH series connector, B03B-XH-A, top entry type, through hole")
@@ -3973,67 +4035,6 @@
     )
   )
 
-  (module Connectors_JST:JST_XH_B03B-XH-A_03x2.50mm_Straight (layer F.Cu) (tedit 58EAE7F0) (tstamp 5A328A2C)
-    (at 91.52 118.142564)
-    (descr "JST XH series connector, B03B-XH-A, top entry type, through hole")
-    (tags "connector jst xh tht top vertical 2.50mm")
-    (path /5A3469C9)
-    (fp_text reference J101 (at 2.5 -3.5) (layer F.SilkS)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_text value Conn_01x03 (at 2.5 4.5) (layer F.Fab)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_line (start -2.45 -2.35) (end -2.45 3.4) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.45 3.4) (end 7.45 3.4) (layer F.Fab) (width 0.1))
-    (fp_line (start 7.45 3.4) (end 7.45 -2.35) (layer F.Fab) (width 0.1))
-    (fp_line (start 7.45 -2.35) (end -2.45 -2.35) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.95 -2.85) (end -2.95 3.9) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -2.95 3.9) (end 7.95 3.9) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 7.95 3.9) (end 7.95 -2.85) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 7.95 -2.85) (end -2.95 -2.85) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -2.55 -2.45) (end -2.55 3.5) (layer F.SilkS) (width 0.12))
-    (fp_line (start -2.55 3.5) (end 7.55 3.5) (layer F.SilkS) (width 0.12))
-    (fp_line (start 7.55 3.5) (end 7.55 -2.45) (layer F.SilkS) (width 0.12))
-    (fp_line (start 7.55 -2.45) (end -2.55 -2.45) (layer F.SilkS) (width 0.12))
-    (fp_line (start 0.75 -2.45) (end 0.75 -1.7) (layer F.SilkS) (width 0.12))
-    (fp_line (start 0.75 -1.7) (end 4.25 -1.7) (layer F.SilkS) (width 0.12))
-    (fp_line (start 4.25 -1.7) (end 4.25 -2.45) (layer F.SilkS) (width 0.12))
-    (fp_line (start 4.25 -2.45) (end 0.75 -2.45) (layer F.SilkS) (width 0.12))
-    (fp_line (start -2.55 -2.45) (end -2.55 -1.7) (layer F.SilkS) (width 0.12))
-    (fp_line (start -2.55 -1.7) (end -0.75 -1.7) (layer F.SilkS) (width 0.12))
-    (fp_line (start -0.75 -1.7) (end -0.75 -2.45) (layer F.SilkS) (width 0.12))
-    (fp_line (start -0.75 -2.45) (end -2.55 -2.45) (layer F.SilkS) (width 0.12))
-    (fp_line (start 5.75 -2.45) (end 5.75 -1.7) (layer F.SilkS) (width 0.12))
-    (fp_line (start 5.75 -1.7) (end 7.55 -1.7) (layer F.SilkS) (width 0.12))
-    (fp_line (start 7.55 -1.7) (end 7.55 -2.45) (layer F.SilkS) (width 0.12))
-    (fp_line (start 7.55 -2.45) (end 5.75 -2.45) (layer F.SilkS) (width 0.12))
-    (fp_line (start -2.55 -0.2) (end -1.8 -0.2) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.8 -0.2) (end -1.8 2.75) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.8 2.75) (end 2.5 2.75) (layer F.SilkS) (width 0.12))
-    (fp_line (start 7.55 -0.2) (end 6.8 -0.2) (layer F.SilkS) (width 0.12))
-    (fp_line (start 6.8 -0.2) (end 6.8 2.75) (layer F.SilkS) (width 0.12))
-    (fp_line (start 6.8 2.75) (end 2.5 2.75) (layer F.SilkS) (width 0.12))
-    (fp_line (start -0.35 -2.75) (end -2.85 -2.75) (layer F.SilkS) (width 0.12))
-    (fp_line (start -2.85 -2.75) (end -2.85 -0.25) (layer F.SilkS) (width 0.12))
-    (fp_line (start -0.35 -2.75) (end -2.85 -2.75) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.85 -2.75) (end -2.85 -0.25) (layer F.Fab) (width 0.1))
-    (fp_text user %R (at 2.5 2.5) (layer F.Fab)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (pad 1 thru_hole rect (at 0 0) (size 1.75 1.75) (drill 1) (layers *.Cu *.Mask)
-      (net 32 ARD_CUR))
-    (pad 2 thru_hole circle (at 2.5 0) (size 1.75 1.75) (drill 1) (layers *.Cu *.Mask)
-      (net 10 ARD_GND))
-    (pad 3 thru_hole circle (at 5 0) (size 1.75 1.75) (drill 1) (layers *.Cu *.Mask)
-      (net 33 ARD_VCC))
-    (model Connectors_JST.3dshapes/JST_XH_B03B-XH-A_03x2.50mm_Straight.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 1 1 1))
-      (rotate (xyz 0 0 0))
-    )
-  )
-
   (module PartsLibraries:Enertechnos_Logo (layer F.Cu) (tedit 5A3293B3) (tstamp 5A32B665)
     (at 113.03 73.66)
     (fp_text reference "" (at 0 0) (layer F.SilkS) hide

MLI/Modular/PsuSwitchModule/PsuSwitchModule.sch

@@ -36,10 +36,10 @@ $Descr A4 11693 8268
 encoding utf-8
 Sheet 1 5
 Title "Power Module (Control Board)"
-Date "2017-12-14"
+Date "2018-01-04"
 Rev "Release 0.1"
 Comp "Enertechnos Ltd"
-Comment1 "FOR REVIEW"
+Comment1 "APPROVED for Prototype"
 Comment2 ""
 Comment3 ""
 Comment4 ""